387 search results - page 32 / 78 » Global Synchronization in Sensornets |
ENTCS
2008
13 years 7 months ago
2008
Timing Closure in presence of long global wire interconnects is one of the main current issues in System-onChip design. One proposed solution to the Timing Closure problem is Late...
MAM
2006
13 years 7 months ago
2006
Embedded systems are typically heterogeneous requiring interacting hardware and software components, are locally synchronous while being globally asynchronous and combine both con...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globa...
ASYNC
2002
IEEE
14 years 16 days ago
2002
IEEE
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...