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DATE
2004
IEEE
126views Hardware» more  DATE 2004»
13 years 11 months ago
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Montek Singh, Michael Theobald
KIVS
2001
Springer
14 years 15 days ago
Real-Time Support on Top of Ethernet
Ethernet is a widely used low-cost networking technology. It however lacks the determinism and resource management features needed to meet realtime requirements of multimedia appli...
Rainer Koster, Thorsten Kramp
CODES
2002
IEEE
14 years 1 months ago
Communication speed selection for embedded systems with networked voltage-scalable processors
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
CDC
2009
IEEE
133views Control Systems» more  CDC 2009»
14 years 23 days ago
On the security of linear consensus networks
Abstract—This work considers the problem of reaching consensus in an unreliable linear consensus network. A solution to this problem is relevant for several tasks in multi-agent ...
Fabio Pasqualetti, Antonio Bicchi, Francesco Bullo
DFT
2006
IEEE
122views VLSI» more  DFT 2006»
13 years 11 months ago
Efficient and Robust Delay-Insensitive QCA (Quantum-Dot Cellular Automata) Design
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
Minsu Choi, Myungsu Choi, Zachary D. Patitz, Nohpi...