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ICCD
2007
IEEE
206views Hardware» more  ICCD 2007»
14 years 4 months ago
SCAFFI: An intrachip FPGA asynchronous interface based on hard macros
Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globa...
Julian J. H. Pontes, Rafael Soares, Ewerson Carval...
ACSD
2009
IEEE
149views Hardware» more  ACSD 2009»
14 years 2 months ago
From Concurrent Multi-clock Programs to Deterministic Asynchronous Implementations
We propose a general method to characterize and synthesize correctness-preserving, asynchronous wrappers for synchronous processes on a globally asynchronous locally synchronous (...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
ASYNC
2000
IEEE
145views Hardware» more  ASYNC 2000»
13 years 11 months ago
Practical Design of Globally-Asynchronous Locally-Synchronous Systems
In this paper we describe a complete design methodology for a globally asynchronous onchip communication network connecting both locally-synchronous and asynchronous modules. Sync...
Jens Muttersbach, Thomas Villiger, Wolfgang Fichtn...
MEMOCODE
2008
IEEE
14 years 1 months ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
14 years 1 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...