This paper presents a solution to the (processor) group membership problem. The methodology followed in designing the algorithm is summarized by the option to optimize the perform...
The paper assumes that business interactions between trading partners are composed of well defined conversations (tasks), such as issue a purchase order, process payment, refund m...
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
—This paper presents a Frequency-Estimation Algorithm for the ADPLL designs instead of traditional binary frequency-search algorithm. With the proposed ADPLL architecture and syn...
Asynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in ...