227 search results - page 14 / 46 » Graph Rewriting for Hardware Dependent Program Optimizations |
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 4 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
SAMOS
2010
Springer
13 years 6 months ago
2010
Springer
Abstract—In this paper we present a Multithreaded programming methodology for multi-core systems that utilizes DataFlow concurrency. The programmer augments the program with macr...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, differe...
ENTCS
2002
13 years 7 months ago
2002
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...