227 search results - page 27 / 46 » Graph Rewriting for Hardware Dependent Program Optimizations |
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
During the course of a program’s execution, a processor performs many trivial computations; that is, computations that can be simplified or where the result is zero, one, or equ...
CAL
2006
13 years 7 months ago
2006
Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Industry vendors hesitate to disseminate proprietary applications to academia and third party vendors. By consequence, the benchmarking process is typically driven by standardized...