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» Graphs for small multiprocessor interconnection networks
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HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
DSN
2000
IEEE
14 years 1 months ago
Fault-Secure Scheduling of Arbitrary Task Graphs to Multiprocessor Systems
In this paper, we propose new scheduling algorithms to achieve fault security in multiprocessor systems. We consider scheduling of parallel programs represented by directed acycli...
Koji Hashimoto, Tatsuhiro Tsuchiya, Tohru Kikuno
IPPS
2010
IEEE
13 years 6 months ago
A general algorithm for detecting faults under the comparison diagnosis model
We develop a widely applicable algorithm to solve the fault diagnosis problem in certain distributed-memory multiprocessor systems in which there are a limited number of faulty pr...
Iain A. Stewart
JSA
2007
162views more  JSA 2007»
13 years 8 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
FPL
2005
Springer
226views Hardware» more  FPL 2005»
14 years 2 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...