Sciweavers

26 search results - page 3 / 6
» Graphs for small multiprocessor interconnection networks
Sort
View
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 2 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
ISCA
2002
IEEE
174views Hardware» more  ISCA 2002»
13 years 8 months ago
Efficient Task Partitioning Algorithms for Distributed Shared Memory Systems
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
Sibabrata Ray, Hong Jiang
HPDC
2009
IEEE
14 years 3 months ago
Maintaining reference graphs of globally accessible objects in fully decentralized distributed systems
Since the advent of electronic computing, the processors’ clock speed has risen tremendously. Now that energy efficiency requirements have stopped that trend, the number of proc...
Björn Saballus, Thomas Fuhrmann
BMCBI
2005
253views more  BMCBI 2005»
13 years 8 months ago
The Use of Edge-Betweenness Clustering to Investigate Biological Function in Protein Interaction Networks
Background: This paper describes an automated method for finding clusters of interconnected proteins in protein interaction networks and retrieving protein annotations associated ...
Ruth Dunn, Frank Dudbridge, Christopher M. Sanders...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
14 years 21 days ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...