Sciweavers

26 search results - page 4 / 6
» Graphs for small multiprocessor interconnection networks
Sort
View
ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
13 years 6 months ago
A3MAP: architecture-aware analytic mapping for networks-on-chip
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
Wooyoung Jang, David Z. Pan
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 2 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
ISAAC
2009
Springer
140views Algorithms» more  ISAAC 2009»
14 years 3 months ago
Tighter Approximation Bounds for Minimum CDS in Wireless Ad Hoc Networks
Abstract. Connected dominating set (CDS) has a wide range of applications in wireless ad hoc networks. A number of approximation algorithms for constructing a small CDS in wireless...
Minming Li, Peng-Jun Wan, F. Frances Yao
ISCA
1997
IEEE
108views Hardware» more  ISCA 1997»
14 years 24 days ago
The SGI Origin: A ccNUMA Highly Scalable Server
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
James Laudon, Daniel Lenoski
CN
2008
108views more  CN 2008»
13 years 8 months ago
Finding a dense-core in Jellyfish graphs
The connectivity of the Internet crucially depends on the relationships between thousands of Autonomous Systems (ASes) that exchange routing information using the Border Gateway P...
Mira Gonen, Dana Ron, Udi Weinsberg, Avishai Wool