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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
ATAL
2010
Springer
13 years 8 months ago
A decentralised coordination algorithm for minimising conflict and maximising coverage in sensor networks
In large wireless sensor networks, the problem of assigning radio frequencies to sensing agents such that no two connected sensors are assigned the same value (and will thus inter...
Ruben Stranders, Alex Rogers, Nicholas R. Jennings
CPAIOR
2009
Springer
14 years 2 months ago
Optimal Interdiction of Unreactive Markovian Evaders
The interdiction problem arises in a variety of areas including military logistics, infectious disease control, and counter-terrorism. In the typical formulation of network interdi...
Alexander Gutfraind, Aric A. Hagberg, Feng Pan
ICDCS
2008
IEEE
14 years 1 months ago
Correlation-Aware Object Placement for Multi-Object Operations
A multi-object operation incurs communication or synchronization overhead when the requested objects are distributed over different nodes. The object pair correlations (the probab...
Ming Zhong, Kai Shen, Joel I. Seiferas
SAC
2010
ACM
13 years 7 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen