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IISWC
2009
IEEE
14 years 2 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee
RTAS
2008
IEEE
14 years 1 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
TCAD
2002
73views more  TCAD 2002»
13 years 7 months ago
System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints
Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource c...
Vikram Iyengar, Krishnendu Chakrabarty
ECTEL
2006
Springer
13 years 11 months ago
Blended Learning Concepts - a Short Overview
This paper presents a short overview of blended learning, showing arguments for and against these concepts. Potential blended learning scenarios are described that vary depending o...
Sonja Trapp
WISE
2002
Springer
14 years 12 days ago
RAL: an Algebra for Querying RDF
To make the World Wide Web machine-understandable there is a strong demand both for languages describing metadata and for languages querying metadata. The Resource Description Fram...
Flavius Frasincar, Geert-Jan Houben, Richard Vdovj...