Sciweavers

477 search results - page 54 / 96
» Guideline: Multiple Hierarchies
Sort
View
ICPP
1999
IEEE
14 years 7 hour ago
Parallel Media Processors for the Billion-Transistor Era
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
Jason Fritts, Zhao Wu, Wayne Wolf
IDEAS
1997
IEEE
107views Database» more  IDEAS 1997»
13 years 12 months ago
Query Processing in the ROL system
The ROL system is a novel deductive object-oriented database system that has been implemented at the University of Regina. It provides a uniform rule-based declarative language fo...
Mengchi Liu, Weidong Yu
UIST
1997
ACM
13 years 12 months ago
Simplifying Component Development in an Integrated Groupware Environment
This paper describes our experiences implementing a component architecture for TeamWave Workplace, an integrated groupware environment using a rooms metaphor. The problem we faced...
Mark Roseman, Saul Greenberg
DATE
2004
IEEE
147views Hardware» more  DATE 2004»
13 years 11 months ago
Automatic Tuning of Two-Level Caches to Embedded Applications
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...