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» HP Caliper: An Architecture for Performance Analysis Tools
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SDL
2001
78views Hardware» more  SDL 2001»
13 years 10 months ago
Using Message Sequence Charts to Accelerate Maintenance of Existing Systems
In this paper we describe our experiences in building tools for accelerating maintenance of existing large telecommunications software. We discuss how various maintenance activitie...
Nikolai Mansurov, Djenana Campara
FPL
2010
Springer
146views Hardware» more  FPL 2010»
13 years 6 months ago
Software Managed Distributed Memories in MPPAs
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
Robin Panda, Jimmy Xu, Scott Hauck
DAC
2005
ACM
13 years 10 months ago
Asynchronous circuits transient faults sensitivity evaluation
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
Yannick Monnet, Marc Renaudin, Régis Leveug...
ASAP
2000
IEEE
125views Hardware» more  ASAP 2000»
14 years 1 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B...
PEWASUN
2008
ACM
13 years 10 months ago
Modular network trace analysis
In this paper we present EDAT, a tool designed for the analysis of trace files from network simulations and experiments. The EDAT framework encapsulates analysis steps in extensib...
Wolfgang Kieß, Nadine Chmill, Ulrich Wittels...