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» Hardware Accelerated Power Estimation
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FPT
2005
IEEE
133views Hardware» more  FPT 2005»
14 years 4 months ago
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator
Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...
Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
14 years 7 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
ISBI
2008
IEEE
14 years 11 months ago
Acoustical power computation acceleration techniques for the planning of ultrasound therapy
The simulation of the effect of a high intensity ultrasound interstitial therapy is mainly connected on an accurate estimation of the pressure delivered by the transducer. This pa...
Jean-Louis Dillenseger, Carole Garnier
GLOBECOM
2009
IEEE
13 years 8 months ago
Implementation and Benchmarking of Hardware Accelerators for Ciphering in LTE Terminals
Abstract--In this paper we investigate hardware implementations of ciphering algorithms, SNOW 3G and the Advanced Encryption Standard (AES), for the acceleration of the protocol st...
Sebastian Hessel, David Szczesny, Nils Lohmann, At...
TCAD
2008
127views more  TCAD 2008»
13 years 10 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...