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» Hardware Acceleration of HMMER on FPGAs
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CCS
2007
ACM
13 years 12 months ago
Reconfigurable trusted computing in hardware
Trusted Computing (TC) is an emerging technology towards building trustworthy computing platforms. The Trusted Computing Group (TCG) has proposed several specifications to impleme...
Thomas Eisenbarth, Tim Güneysu, Christof Paar...
IPPS
2007
IEEE
14 years 2 months ago
Distributed IDS using Reconfigurable Hardware
With the rapid growth of computer networks and network infrastructures and increased dependency on the internet to carry out day-to-day activities, it is imperative that the compo...
Ashok Kumar Tummala, Parimal Patel
CHES
2008
Springer
134views Cryptology» more  CHES 2008»
13 years 10 months ago
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
Tim Güneysu, Christof Paar
TVLSI
2010
13 years 2 months ago
Improving FPGA Performance for Carry-Save Arithmetic
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP...
Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk,...
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 11 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...