114 search results - page 8 / 23 » Hardware Acceleration of HMMER on FPGAs |
ICS
2011
Tsinghua U.
12 years 11 months ago
2011
Tsinghua U.
Suppose one is considering purchase of a computer equipped with accelerators. Or suppose one has access to such a computer and is considering porting code to take advantage of the...
ISCAS
2003
IEEE
14 years 1 months ago
2003
IEEE
The Hamiltonian Cycle (HC) problem is an important graph problem with many applications. The general backtracking algorithm normally used for random graphs often takes far too lon...
ARC
2009
Springer
14 years 16 days ago
2009
Springer
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...