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» Hardware Reuse at the Behavioral Level
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ECBS
2008
IEEE
110views Hardware» more  ECBS 2008»
14 years 3 months ago
Goal-Based Modeling of Dynamically Adaptive System Requirements
Self-adaptation is emerging as an increasingly important capability for many applications, particularly those deployed in dynamically changing environments, such as ecosystem moni...
Heather Goldsby, Peter Sawyer, Nelly Bencomo, Bett...
AAAI
2008
13 years 9 months ago
Bimodal Spatial Reasoning with Continuous Motion
Symbolic AI systems typically have difficulty reasoning about motion in continuous environments, such as determining whether a cornering car will clear a close obstacle. Bimodal s...
Samuel Wintermute, John E. Laird
ISCA
2012
IEEE
244views Hardware» more  ISCA 2012»
11 years 11 months ago
Scheduling heterogeneous multi-cores through performance impact estimation (PIE)
Single-ISA heterogeneous multi-core processors are typically composed of small (e.g., in-order) power-efficient cores and big (e.g., out-of-order) high-performance cores. The eff...
Kenzo Van Craeynest, Aamer Jaleel, Lieven Eeckhout...
ISQED
2000
IEEE
91views Hardware» more  ISQED 2000»
14 years 27 days ago
Probabilistic Bottom-Up RTL Power Estimation
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
Ricardo Ferreira, A.-M. Trullemans, José C....
ICCAD
2004
IEEE
94views Hardware» more  ICCAD 2004»
14 years 5 months ago
Timing macro-modeling of IP blocks with crosstalk
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
Ruiming Chen, Hai Zhou