Sciweavers

398 search results - page 43 / 80
» Hardware Reuse at the Behavioral Level
Sort
View
AINA
2006
IEEE
14 years 8 days ago
Efficient Packet Scheduler For Wireless Ad Hoc Networks With Switched Beam Antennas
Using beam forming antennas in ad hoc networks have been recently focused on, in order to improve the space reuse. This news context implies to revisit network algorithms because t...
Gilles Grimaud, Antoine Honore, Hervé Meuni...
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
14 years 7 days ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
ECMDAFA
2006
Springer
228views Hardware» more  ECMDAFA 2006»
14 years 5 days ago
Model Driven Development of Multi-Agent Systems
Abstract. Design patterns are templates of general solutions to commonlyoccurring problems in the analysis and design of software systems. In mature development processes, engineer...
Juan Pavón, Jorge J. Gómez-Sanz, Rub...
CONIELECOMP
2011
IEEE
13 years 2 days ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 1 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...