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CSE
2011
IEEE
12 years 7 months ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
ASPLOS
2006
ACM
14 years 1 months ago
Supporting nested transactional memory in logTM
Nested transactional memory (TM) facilitates software composition by letting one module invoke another without either knowing whether the other uses transactions. Closed nested tr...
Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore...
ATVA
2005
Springer
202views Hardware» more  ATVA 2005»
14 years 1 months ago
Model Checking Real Time Java Using Java PathFinder
Abstract. The Real Time Specification for Java (RTSJ) is an augmentation of Java for real time applications of various degrees of hardness. The central features of RTSJ are real t...
Gary Lindstrom, Peter C. Mehlitz, Willem Visser
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
SAC
2010
ACM
13 years 7 months ago
Improving the efficiency of dynamic malware analysis
Each day, security companies see themselves confronted with thousands of new malware programs. To cope with these large quantities, researchers and practitioners alike have develo...
Ulrich Bayer, Engin Kirda, Christopher Kruegel