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ISPD
2003
ACM
89views Hardware» more  ISPD 2003»
14 years 22 days ago
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Traditional multilevel partitioning approaches have shown good performance with respect to cutsize, but offer no guarantees with respect to system performance. Timing-driven part...
Andrew B. Kahng, Xu Xu
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
VALUETOOLS
2006
ACM
176views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
How to solve large scale deterministic games with mean payoff by policy iteration
Min-max functions are dynamic programming operators of zero-sum deterministic games with finite state and action spaces. The problem of computing the linear growth rate of the or...
Vishesh Dhingra, Stephane Gaubert
IPPS
2000
IEEE
13 years 12 months ago
Study of a Multilevel Approach to Partitioning for Parallel Logic Simulation
Parallel simulation techniques are often employed to meet the computational requirements of large hardware simulations in order to reduce simulation time. In addition, partitionin...
Swaminathan Subramanian, Dhananjai Madhava Rao, Ph...
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
13 years 11 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong