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TON
2010
93views more  TON 2010»
13 years 2 months ago
Design and field experimentation of an energy-efficient architecture for DTN throwboxes
Disruption tolerant networks rely on intermittent contacts between mobile nodes to deliver packets using a storecarry-and-forward paradigm. We earlier proposed the use of throwbox ...
Nilanjan Banerjee, Mark D. Corner, Brian Neil Levi...
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 4 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
IJPP
2011
115views more  IJPP 2011»
12 years 11 months ago
Milepost GCC: Machine Learning Enabled Self-tuning Compiler
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
Grigori Fursin, Yuriy Kashnikov, Abdul Wahid Memon...
SAMOS
2007
Springer
14 years 1 months ago
Online Prediction of Applications Cache Utility
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
Miquel Moretó, Francisco J. Cazorla, Alex R...
ICCAD
2001
IEEE
144views Hardware» more  ICCAD 2001»
14 years 4 months ago
Faster SAT and Smaller BDDs via Common Function Structure
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah