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» Hardware Support for Control Transfers in Code Caches
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VECPAR
2000
Springer
13 years 11 months ago
Improving the Performance of Heterogeneous DSMs via Multithreading
This paper analyzes the impact of hardware multithreading support on the performance of distributed shared-memory DSM multiprocessors built out of heterogeneous, single-chip compu...
Renato J. O. Figueiredo, Jeffrey P. Bradford, Jos&...
IWOMP
2007
Springer
14 years 1 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
SIGMOD
2001
ACM
146views Database» more  SIGMOD 2001»
14 years 7 months ago
On Supporting Containment Queries in Relational Database Management Systems
Virtually all proposals for querying XML include a class of query we term "containment queries". It is also clear that in the foreseeable future, a substantial amount of...
Chun Zhang, Jeffrey F. Naughton, David J. DeWitt, ...
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
14 years 25 days ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
CAV
2005
Springer
99views Hardware» more  CAV 2005»
14 years 1 months ago
Model Checking x86 Executables with CodeSurfer/x86 and WPDS++
This paper presents a toolset for model checking x86 executables. The members of the toolset are CodeSurfer/x86, WPDS++, and the Path Inspector. CodeSurfer/x86 is used to extract a...
Gogul Balakrishnan, Thomas W. Reps, Nicholas Kidd,...