In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
We investigate the application of genetic algorithms (GAs) for recognizing real two-dimensional (2-D) or three-dimensional (3-D) objects from 2-D intensity images, assuming that th...
George Bebis, Evangelos A. Yfantis, Sushil J. Loui...
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...