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» Hardware Support for Interval Arithmetic
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ARITH
2007
IEEE
14 years 1 months ago
Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding
Shrinking feature sizes gives more headroom for designers to extend the functionality of microprocessors. The IEEE 754R working group has revised the IEEE 754-1985 Standard for Bi...
Liang-Kai Wang, Michael J. Schulte
ICECCS
1997
IEEE
92views Hardware» more  ICECCS 1997»
13 years 11 months ago
Cache based fault recovery for distributed systems
No cache based techniques for roll-forward fault recovery exist at present. A split-cache approach is proposed that provides e cient support for checkpointing and roll-forward fau...
Avi Mendelson, Neeraj Suri
DAGSTUHL
2008
13 years 9 months ago
Extending the Range of C-XSC: Some Tools and Applications for the use in Parallel and other Environments
We present some examples of extensions for C-XSC that have been developed lately. Among these are extensions that give access to further hardware and software environments as well ...
Markus Grimmer
ASPLOS
2008
ACM
13 years 9 months ago
Hardbound: architectural support for spatial safety of the C programming language
The C programming language is at least as well known for its absence of spatial memory safety guarantees (i.e., lack of bounds checking) as it is for its high performance. C'...
Joe Devietti, Colin Blundell, Milo M. K. Martin, S...
IPPS
2005
IEEE
14 years 1 months ago
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna