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» Hardware Synthesis from C C Models
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113
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FPL
2004
Springer
89views Hardware» more  FPL 2004»
15 years 9 months ago
HW/SW Co-design by Automatic Embedding of Complex IP Cores
Complex SoC and platform-based designs require integration of configurable IP cores from multiple sources. Even automatic compilation flows from a high-level description to HW/SW s...
Holger Lange, Andreas Koch
135
Voted
GMP
2010
IEEE
191views Solid Modeling» more  GMP 2010»
15 years 5 months ago
Constraints on Curve Networks Suitable for G2 Interpolation
When interpolating a network of curves to create a C1 surface from spline patches, the network has to satisfy an algebraic condition, called the vertex enclosure constraint. We sho...
Thomas Hermann, Jörg Peters, Tim Strotman
153
Voted
VIS
2004
IEEE
152views Visualization» more  VIS 2004»
16 years 4 months ago
Haptic Display of Interaction between Textured Models
Surface texture is among the most salient haptic characteristics of objects; it can induce vibratory contact forces that lead to perception of roughness. In this paper, we present...
Avneesh Sud, Miguel A. Otaduy, Ming C. Lin, Nitin ...
143
Voted
QEST
2007
IEEE
15 years 10 months ago
A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
Girish B. C., R. Govindarajan
142
Voted
CODES
2003
IEEE
15 years 9 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski