Sciweavers

951 search results - page 146 / 191
» Hardware design experiences in ZebraNet
Sort
View
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
14 years 5 months ago
A memory optimization technique for software-managed scratchpad memory in GPUs
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
DATE
2008
IEEE
75views Hardware» more  DATE 2008»
14 years 5 months ago
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...
Srinivasan Murali, Almir Mutapcic, David Atienza, ...
DATE
2008
IEEE
111views Hardware» more  DATE 2008»
14 years 5 months ago
A Formal Approach To The Protocol Converter Problem
In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approach...
Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Rames...
LCN
2008
IEEE
14 years 5 months ago
DiCAP: Distributed Packet Capturing architecture for high-speed network links
— IP traffic measurements form the basis of several network management tasks, such as accounting, planning, intrusion detection, and charging. High-speed network links challenge ...
Cristian Morariu, Burkhard Stiller
DFT
2007
IEEE
141views VLSI» more  DFT 2007»
14 years 5 months ago
A Fault-Tolerant Active Pixel Sensor to Correct In-Field Hot Pixel Defects
Solid-state image sensors develop in-field defects in all common environments. Experiments have demonstrated the growth of significant quantities of hot-pixel defects that degrade...
Jozsef Dudas, Michelle L. La Haye, Jenny Leung, Gl...