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IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 5 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
ETS
2011
IEEE
224views Hardware» more  ETS 2011»
12 years 7 months ago
AVF Analysis Acceleration via Hierarchical Fault Pruning
—The notion of Architectural Vulnerability Factor (AVF) has been extensively used by designers to evaluate various aspects of design robustness. While AVF is a very accurate way ...
Michail Maniatakos, Chandra Tirumurti, Abhijit Jas...
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 20 days ago
The Modelling of Embedded Systems Using HASoC
We present a design method (HASoC) for the lifecycle modelling of embedded systems that are targeted primarily, but not necessarily, at SoC implementations. The object-oriented de...
M. D. Edwards, P. N. Green
ECBS
2007
IEEE
144views Hardware» more  ECBS 2007»
14 years 2 months ago
DP-Miner: Design Pattern Discovery Using Matrix
Design patterns document expert design experience in software system development. They have been applied in many existing software systems. However, pattern information is general...
Jing Dong, Dushyant S. Lad, Yajing Zhao
ICCAD
2000
IEEE
99views Hardware» more  ICCAD 2000»
14 years 3 days ago
On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools
The incremental, “construct by correction” design methodology has become widespread in constraint-dominated DSM design. We study the problem of ECO for physical design domains...
Andrew B. Kahng, Stefanus Mantik