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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 5 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
TE
2010
102views more  TE 2010»
13 years 2 months ago
An Undergraduate Course and Laboratory in Digital Signal Processing With Field Programmable Gate Arrays
In this paper, an innovative educational approach to introducing undergraduates to both digital signal processing (DSP) and field programmable gate array (FPGA)-based design in a o...
Uwe Meyer-Bäse, G. Alonzo Vera, Anke Meyer-B&...
DFT
1998
IEEE
88views VLSI» more  DFT 1998»
13 years 12 months ago
Characterization of CMOS Defects using Transient Signal Analysis
We present the results of hardware experiments designed to determine the relative contribution of CMOS coupling mechanisms to off-path signal variations caused by common types of ...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
ASSETS
2007
ACM
13 years 11 months ago
Using participatory activities with seniors to critique, build, and evaluate mobile phones
Mobile phones can provide a number of benefits to older people. However, most mobile phone designs and form factors are targeted at younger people and middle-aged adults. To infor...
Michael Massimi, Ronald M. Baecker, Michael Wu
ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler