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» Hardware design experiences in ZebraNet
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ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...
EH
2003
IEEE
100views Hardware» more  EH 2003»
14 years 3 months ago
Learning for Evolutionary Design
This paper describes a technique for evolving similar solutions to similar configuration design problems. Using the configuration design of combination logic circuits as a testb...
Sushil J. Louis
ICNP
2006
IEEE
14 years 4 months ago
Rigorous Protocol Design in Practice: An Optical Packet-Switch MAC in HOL
— This paper reports on an experiment in network protocol design: we use novel rigorous techniques in the design process of a new protocol, in a close collaboration between syste...
Adam Biltcliffe, Michael Dales, Sam Jansen, Tom Ri...
ISCAS
2006
IEEE
87views Hardware» more  ISCAS 2006»
14 years 4 months ago
NoC monitoring: impact on the design flow
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
Calin Ciordas, Kees Goossens, Andrei Radulescu, Tw...
ICCAD
2009
IEEE
131views Hardware» more  ICCAD 2009»
13 years 7 months ago
Scheduling with soft constraints
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Jason Cong, Bin Liu, Zhiru Zhang