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» Hardware design experiences in ZebraNet
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RTAS
1997
IEEE
13 years 11 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
13 years 11 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
DSD
2009
IEEE
152views Hardware» more  DSD 2009»
13 years 11 months ago
ARROW - A Generic Hardware Fault Injection Tool for NoCs
Todays NoCs are reaching a level where it is getting very hard to ensure 100% of functionality. Consequently, fault tolerance has become an important aspect in todays design techn...
Michael Birner, Thomas Handl
ET
2007
111views more  ET 2007»
13 years 7 months ago
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
This article describes an emulation-based method for locating stuck-at faults in combinational and synchronous sequential circuits. The method is based on automatically designing a...
Fatih Kocan, Daniel G. Saab
ECMDAFA
2008
Springer
97views Hardware» more  ECMDAFA 2008»
13 years 9 months ago
Model-Driven Security in Practice: An Industrial Experience
Abstract. In this paper we report on our experience on using the socalled model-driven security approach in an MDA industrial project. In model-driven security, "designers spe...
Manuel Clavel, Viviane da Silva, Christiano Braga,...