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» Hardware efficient architectures for Eigenvalue computation
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IPPS
1996
IEEE
14 years 20 days ago
A New Approach to Pipeline FFT Processor
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
Shousheng He, Mats Torkelson
ASPDAC
2005
ACM
132views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Automatic synthesis and scheduling of multirate DSP algorithms
- To date, most high-level synthesis systems do not automatically solve present design problems, such as those related to timing associated with the physical implementation of mult...
Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousia...
ANCS
2008
ACM
13 years 10 months ago
Design of a scalable network programming framework
Nearly all programmable commercial hardware solutions offered for high-speed networking systems are capable of meeting the performance and flexibility requirements of equipment ve...
Ben Wun, Patrick Crowley, Arun Raghunath
APCCAS
2006
IEEE
261views Hardware» more  APCCAS 2006»
14 years 2 months ago
Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations
—In this paper, an area/delay efficient recoding method for parallel CORDIC (COordinate Rotation DIgital Computer) rotation algorithm is proposed. This recoding method can reduce...
Tso-Bing Juang
DAC
2006
ACM
14 years 9 months ago
An efficient retiming algorithm under setup and hold constraints
In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous...
Chuan Lin, Hai Zhou