421 search results - page 9 / 85 » Hardware efficient architectures for Eigenvalue computation |
ICPR
2004
IEEE
14 years 9 months ago
2004
IEEE
Pattern recognition and computer vision tasks are computationally intensive, repetitive, and often exceed the capabilities of the CPU, leaving little time for higher level tasks. ...
DAC
1996
ACM
14 years 18 days ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
SIGMETRICS
2006
ACM
14 years 2 months ago
2006
ACM
In this paper, we investigate the suitability of embedding Internet hosts into a Euclidean space given their pairwise distances (as measured by round-trip time). Using the classic...
CVPR
2007
IEEE
14 years 10 months ago
2007
IEEE
This paper presents our progress on OpenVL - a novel software architecture to address efficiency through facilitating hardware acceleration, reusability and scalability for comput...
TC
2010
13 years 6 months ago
2010
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...