355 search results - page 24 / 71 » Hardware implementation of a novel genetic algorithm |
ICCD
1994
IEEE
13 years 11 months ago
1994
IEEE
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
ESORICS
2006
Springer
13 years 11 months ago
2006
Springer
Timing side channels are a serious threat to the security of cryptographic algorithms. This paper presents a novel method for the timing-sensitive analysis of information flow in s...
TR
2010
13 years 2 months ago
2010
Redundancy allocation problems (RAPs) have attracted much attention for the past thirty years due to its wide applications in improving the reliability of various engineering syste...
ICES
1998
Springer
13 years 12 months ago
1998
Springer
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...