355 search results - page 43 / 71 » Hardware implementation of a novel genetic algorithm |
FCCM
1999
IEEE
14 years 43 min ago
1999
IEEE
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
The phase detector is a main building block in phaselocked loop (PLL) applications. FPGAs permit the realtime implementation of the CORDIC algorithm which offers an efficient solu...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
— A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques th...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
In this paper, we propose the first wire density driven global routing that considers CMP variation and timing. To enable CMP awareness during global routing, we propose a compac...