355 search results - page 46 / 71 » Hardware implementation of a novel genetic algorithm |
IPPS
2003
IEEE
14 years 29 days ago
2003
IEEE
This paper is devoted to the study of number representations and algorithms leading to efficient implementations of modular adders and multipliers on recent Field Programmable Ar...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
- The novel CORDIC-based architecture of the these weights (combiner unit). The implementation of the Triangular Systolic Array for QRD of large size complex combiner unit is rathe...
APCSAC
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adde...
CODES
1996
IEEE
13 years 12 months ago
1996
IEEE
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...
INFOCOM
2010
IEEE
13 years 5 months ago
2010
IEEE
On today's high-speed backbone network links, measuring per-flow traffic information has become very challenging. Maintaining exact per-flow packet counters on OC-192 or OC-76...