Sciweavers

111 search results - page 18 / 23
» Hardware scheduling support in SMP architectures
Sort
View
VEE
2005
ACM
119views Virtualization» more  VEE 2005»
14 years 9 days ago
A programmable microkernel for real-time systems
We present a new software system architecture for the implementation of hard real-time applications. The core of the system is a microkernel whose reactivity (interrupt handling a...
Christoph M. Kirsch, Marco A. A. Sanvido, Thomas A...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 24 days ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
13 years 10 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel
CGO
2009
IEEE
14 years 1 months ago
Software Pipelined Execution of Stream Programs on GPUs
—The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. This model allows programmers to sp...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
APCSAC
2001
IEEE
13 years 10 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li