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ISPASS
2010
IEEE
14 years 2 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
ICRA
2005
IEEE
184views Robotics» more  ICRA 2005»
14 years 1 months ago
3D Virtual Prototyping of Home Service Robots Using ASADAL/OBJ
– Typical robot development requires that hardware be mostly functional before significant software development begins. Utilizing virtual prototype of hardware and its environmen...
Kyo Chul Kang, Moonzoo Kim, Jaejoon Lee, Byungkil ...
CLUSTER
2007
IEEE
13 years 11 months ago
Identifying energy-efficient concurrency levels using machine learning
Abstract-- Multicore microprocessors have been largely motivated by the diminishing returns in performance and the increased power consumption of single-threaded ILP microprocessor...
Matthew Curtis-Maury, Karan Singh, Sally A. McKee,...
MSS
1999
IEEE
150views Hardware» more  MSS 1999»
13 years 11 months ago
Performance Benchmark Results for Automated Tape Library High Retrieval Rate Applications - Digital Check Image Retrievals
Benchmark tests have been designed and conducted for the purpose of evaluating the use of automated tape libraries in on-line digital check image retrieval applications. This type...
John Gniewek, George Davidson, Bowen Caldwell
DATE
2009
IEEE
92views Hardware» more  DATE 2009»
14 years 2 months ago
Using randomization to cope with circuit uncertainty
—Future computing systems will feature many cores that run fast, but might show more faults compared to existing CMOS technologies. New software methodologies must be adopted to ...
Hamid Safizadeh, Mohammad Tahghighi, Ehsan K. Arde...