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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 3 months ago
A Time Slice Based Scheduler Model for System Level Design
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
ETFA
2008
IEEE
14 years 4 months ago
Pinpointing interrupts in embedded real-time systems using context checksums
When trying to track down bugs using cyclic debugging, the ability to correctly reproduce executions is imperative. In sequential, deterministic, non-real-time software, this repr...
Daniel Sundmark, Henrik Thane
DAC
2000
ACM
14 years 11 months ago
Interactive co-design of high throughput embedded multimedia
The idea of Force-Directed Scheduling (FDS) was first introduced by Paulin and Knight to minimize the number of resources required in the high-level synthesis of high-throughput A...
Thierry J.-F. Omnés, Thierry Franzetti, Fra...
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 3 months ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
SENSYS
2004
ACM
14 years 3 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...