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» Hardware support for code integrity in embedded processors
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ICSR
2004
Springer
14 years 1 months ago
Validating Quality of Service for Reusable Software Via Model-Integrated Distributed Continuous Quality Assurance
Quality assurance (QA) tasks, such as testing, profiling, and performance evaluation, have historically been done in-house on developer-generated workloads and regression suites. ...
Arvind S. Krishna, Douglas C. Schmidt, Atif M. Mem...
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 1 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
PAIRING
2007
Springer
132views Cryptology» more  PAIRING 2007»
14 years 1 months ago
Instruction Set Extensions for Pairing-Based Cryptography
A series of recent algorithmic advances has delivered highly effective methods for pairing evaluation and parameter generation. However, the resulting multitude of options means m...
Tobias Vejda, Dan Page, Johann Großschä...
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 5 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
CODES
2005
IEEE
14 years 1 months ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha