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» Hardware support for code integrity in embedded processors
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CODES
2008
IEEE
14 years 2 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
ECCV
2006
Springer
14 years 9 months ago
Robust and Efficient Photo-Consistency Estimation for Volumetric 3D Reconstruction
Estimating photo-consistency is one of the most important ingredients for any 3D stereo reconstruction technique that is based on a volumetric scene representation. This paper pres...
Alexander Hornung, Leif Kobbelt
MASCOTS
2007
13 years 9 months ago
Adaptive Sampling for Efficient MPSoC Architecture Simulation
—Modern micro-architecture simulators are many orders of magnitude slower than the hardware they simulate. The use of multiprocessor architectures for supporting future mobile an...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar
FPL
2007
Springer
105views Hardware» more  FPL 2007»
14 years 1 months ago
Time Predictable CPU and DMA Shared Memory Access
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
Christof Pitter, Martin Schoeberl
CODES
2009
IEEE
14 years 10 days ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...