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» Hardware support for code integrity in embedded processors
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VEE
2009
ACM
146views Virtualization» more  VEE 2009»
14 years 2 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...
RTSS
2007
IEEE
14 years 1 months ago
FireFly Mosaic: A Vision-Enabled Wireless Sensor Networking System
— With the advent of CMOS cameras, it is now possible to make compact, cheap and low-power image sensors capable of on-board image processing. These embedded vision sensors provi...
Anthony Rowe, Dhiraj Goel, Raj Rajkumar
ACSAC
2003
IEEE
14 years 26 days ago
MLS-PCA: A High Assurance Security Architecture for Future Avionics
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
Clark Weissman
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 2 months ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting ...
Valentin Gherman, Samuel Evain, Mickael Cartron, N...
ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
13 years 11 months ago
Generating instruction sets and microarchitectures from applications
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
Ing-Jer Huang, Alvin M. Despain