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» Hardware support for code integrity in embedded processors
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CASES
2005
ACM
13 years 9 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 4 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
SCOPES
2005
Springer
14 years 1 months ago
Generic Software Pipelining at the Assembly Level
Software used in embedded systems is subject to strict timing and space constraints. The growing software complexity creates an urgent need for fast program execution under the co...
Daniel Kästner, Markus Pister
CODES
2009
IEEE
13 years 11 months ago
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses
Microcoded customized IPs offer superior performance and direct programmability of micro-architectural structures compared to instruction-based processors, yet at the cost of dra...
Chengmo Yang, Mingjing Chen, Alex Orailoglu
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
14 years 15 days ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...