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» Hardware support for code integrity in embedded processors
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PERCOM
2006
ACM
13 years 7 months ago
Operating System Support for Dynamic Code Loading in Sensor Networks
Sensor network operating systems have to operate with limited hardware resources. Constraints on power consumption greatly reduce the resources available to such an operating syst...
Stefan Beyer, Robert Taylor, Ken Mayes
HPCA
1998
IEEE
13 years 12 months ago
Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
Ye Zhang, Lawrence Rauchwerger, Josep Torrellas
APCSAC
2001
IEEE
13 years 11 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
DAC
1997
ACM
13 years 11 months ago
Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
Matthias Bauer, Wolfgang Ecker
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
14 years 4 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...