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» Hardware support for code integrity in embedded processors
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RTSS
2003
IEEE
14 years 27 days ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
CASES
2007
ACM
13 years 11 months ago
SCCP/x: a compilation profile to support testing and verification of optimized code
Embedded systems are often used in safety-critical environments. Thus, thorough testing of them is mandatory. A quite active research area is the automatic test-case generation fo...
Raimund Kirner
ICPPW
2000
IEEE
14 years 20 hour ago
Flits: Pervasive Computing for Processor and Memory Constrained Systems
Many pervasive computing software technologies are targeted for 32-bit desktop platforms. However, there are innumerable 8, 16, and 32-bit microcontroller and microprocessor-based...
William Majurski, Alden Dima, Mary Laamanen
LCTRTS
2001
Springer
14 years 2 days ago
A Dynamic Programming Approach to Optimal Integrated Code Generation
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...
Christoph W. Keßler, Andrzej Bednarski
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
14 years 2 months ago
Automated synthesis of streaming C applications to process networks in hardware
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
Sven van Haastregt, Bart Kienhuis