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» Hardware support for code integrity in embedded processors
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FPGA
2008
ACM
129views FPGA» more  FPGA 2008»
13 years 9 months ago
Efficient ASIP design for configurable processors with fine-grained resource sharing
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
Quang Dinh, Deming Chen, Martin D. F. Wong
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
14 years 8 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
ISCAPDCS
2001
13 years 9 months ago
End-user Tools for Application Performance Analysis Using Hardware Counters
One purpose of the end-user tools described in this paper is to give users a graphical representation of performance information that has been gathered by instrumenting an applica...
Kevin S. London, Jack Dongarra, Shirley Moore, Phi...
CASES
2000
ACM
14 years 1 days ago
A code generation framework for Java component-based designs
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
Jeff Tsay, Christopher Hylands, Edward Lee
JSS
2007
99views more  JSS 2007»
13 years 7 months ago
FC-ORB: A robust distributed real-time embedded middleware with end-to-end utilization control
A key challenge for distributed real-time and embedded (DRE) middleware is maintaining both system reliability and desired real-time performance in unpredictable environments wher...
Xiaorui Wang, Yingming Chen, Chenyang Lu, Xenofon ...