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» Hardware support for code integrity in embedded processors
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WMPI
2004
ACM
14 years 1 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
CASES
2006
ACM
14 years 1 months ago
Scalable subgraph mapping for acyclic computation accelerators
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami ...
SAMOS
2009
Springer
14 years 2 months ago
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems
Abstract. In this paper, we present a particularly lightweight, integrative approach to programming and executing applications targeting heterogeneous, dynamically reconfigurable ...
Rainer Buchty, Mario Kicherer, David Kramer, Wolfg...
SBACPAD
2004
IEEE
86views Hardware» more  SBACPAD 2004»
13 years 9 months ago
Multi-Profile Instruction Based Compression
Code compression has been used to minimize the memory area requirement of embedded systems. Recently, performance improvement and energy consumption reductionare observed as a by-...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
CODES
2005
IEEE
14 years 1 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...