115 search results - page 21 / 23 » Hardware synthesis from protocol specifications in LOTOS |
FCCM
2007
IEEE
14 years 4 months ago
2007
IEEE
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
CASES
2000
ACM
14 years 2 months ago
2000
ACM
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
CORR
2008
Springer
13 years 10 months ago
2008
Springer
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
CODES
2006
IEEE
14 years 3 months ago
2006
IEEE
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
We propose a new approach to accelerate transaction level verification by raising the productivity of the verification suites including test patterns, protocol checker, and simula...