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ICC
2011
IEEE
236views Communications» more  ICC 2011»
12 years 9 months ago
0 to 10k in 20 Seconds: Bootstrapping Large-Scale DHT Networks
—A handful of proposals address the problem of bootstrapping a large DHT network from scratch, but they all forgo the standard DHT join protocols in favor of their own distribute...
Jae Woo Lee, Henning Schulzrinne, Wolfgang Kellere...
ISPD
2012
ACM
234views Hardware» more  ISPD 2012»
12 years 5 months ago
MAPLE: multilevel adaptive placement for mixed-size designs
We propose a new multilevel framework for large-scale placement called MAPLE that respects utilization constraints, handles movable macros and guides the transition between global...
Myung-Chul Kim, Natarajan Viswanathan, Charles J. ...
FPGA
2005
ACM
95views FPGA» more  FPGA 2005»
14 years 3 months ago
The Stratix II logic and routing architecture
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...
David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaugh...
FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
14 years 2 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
SPAA
1996
ACM
14 years 1 months ago
From AAPC Algorithms to High Performance Permutation Routing and Sorting
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Thomas Stricker, Jonathan C. Hardwick