260 search results - page 12 / 52 » Haskell on a shared-memory multiprocessor |
ASPLOS
1991
ACM
14 years 3 days ago
1991
ACM
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
HIPC
2007
Springer
14 years 2 months ago
2007
Springer
Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
HPCA
1999
IEEE
14 years 27 days ago
1999
IEEE
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...