Sciweavers

3470 search results - page 556 / 694
» Head-Elementary-Set-Free Logic Programs
Sort
View
CAV
2008
Springer
113views Hardware» more  CAV 2008»
14 years 24 days ago
Producing Short Counterexamples Using "Crucial Events"
Ideally, a model checking tool should successfully tackle state space explosion for complete system validation, while providing short counterexamples when an error exists. Techniqu...
Sujatha Kashyap, Vijay K. Garg
ASP
2005
Springer
14 years 23 days ago
Exploiting ASP for Semantic Information Extraction
Abstract. The paper describes HıLεX, a new ASP-based system for the extraction of information from unstructured documents. Unlike previous systems, which are mainly syntactic, HÄ...
Massimo Ruffolo, Nicola Leone, Marco Manna, Domeni...
CCGRID
2005
IEEE
14 years 23 days ago
The Composite Endpoint Protocol (CEP): scalable endpoints for terabit flows
We introduce the Composite Endpoint Protocol (CEP) which efficiently composes a set of transmission elements to support high speed flows which exceed the capabilities of a single...
Eric Weigle, Andrew A. Chien
DAC
2005
ACM
14 years 22 days ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
ERSA
2008
92views Hardware» more  ERSA 2008»
14 years 7 days ago
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
Hasitha Muthumala Waidyasooriya, Masanori Hariyama...